initial commit

kernel/Start.S

@@ -0,0 +1,32 @@
+.section ".text.boot"
+
+.global _start
+
+_start:
+	// read cpu id, stop slave cores
+	mrs     x1, mpidr_el1
+	and     x1, x1, #3
+	cbz     x1, 2f
+	// cpu id > 0, stop
+1:  
+	wfe
+	b       1b
+2:// cpu id == 0
+	// set top of stack just before our code (stack grows to a lower address per AAPCS64)
+	ldr     x1, =_start
+	mov     sp, x1
+
+	// clear bss
+	ldr     x1, =__bss_start
+	ldr     w2, =__bss_size
+3:  
+	cbz     w2, 4f
+	str     xzr, [x1], #8
+	sub     w2, w2, #1
+	cbnz    w2, 3b
+
+4:
+	// jump to C code, should not return
+	bl      main
+	// for failsafe, halt this core too
+	b       1b

kernel/linker.ld

@@ -0,0 +1,33 @@
+ENTRY(_start)
+MEMORY
+{
+  TEXT (rx) : ORIGIN = 0x80000, LENGTH = 128K
+  RO (r) : ORIGIN = 0xa0000, LENGTH = 128K
+  DATA (rw) : ORIGIN = 0x100000, LENGTH = 512K
+  RAM (rw) : ORIGIN = 0x180000, LENGTH = 8M
+}
+
+SECTIONS
+{
+  .text : { 
+    KEEP(*(.text.boot))
+    *(.text)
+  } >TEXT
+  .rodata : {
+    *(.rodata)
+  } >RO
+  .data : {
+    *(.data)
+  } >DATA
+  .bss : {
+    __bss_start = .;
+    *(.bss)
+    __bss_end = .;
+  } >DATA
+  __stack_end = ORIGIN(RAM) + LENGTH(RAM);
+}
+
+__kernel = 0x80000;
+__heap_start = ORIGIN(RAM);
+__heap_end = ORIGIN(RAM) + LENGTH(RAM) - 2M;
+__bss_size = (__bss_end - __bss_start)>>3;

kernel/main.c

@@ -0,0 +1,12 @@
+#include <uart.h>
+#include <shell.h>
+
+void main()
+{
+  uart_init();
+
+  int shell_cont = 1;
+  while (shell_cont) {
+    shell_cont = shell(); 
+  }
+}