hw2 done

kernel/Start.S

@@ -4,25 +4,24 @@
 
 _start:
 	// read cpu id, stop slave cores
-	mrs     x1, mpidr_el1
-	and     x1, x1, #3
-	cbz     x1, 2f
+	mrs x1, mpidr_el1
+	and x1, x1, #3
+	cbz x1, run
 	// cpu id > 0, stop
-1:  
+wait:
 	wfe
-	b       1b
-2:// cpu id == 0
-	// set top of stack just before our code (stack grows to a lower address per AAPCS64)
-	ldr     x1, =_start
-	mov     sp, x1
+	b wait
+
+run: // cpu id == 0
+  mov x20, x0
+	adrp x0, __stack_end
+	mov sp, x0
 
 	// clear bss
 	adr x0, __bss_start
 	adr x1, __bss_end
 	bl memzero
 
-4:
-	// jump to C code, should not return
-	bl      main
-	// for failsafe, halt this core too
-	b       1b
+	mov x0, x20
+	bl main
+	b wait

kernel/linker.ld

@@ -4,7 +4,7 @@ MEMORY
   TEXT (rx) : ORIGIN = 0x80000, LENGTH = 128K
   RO (r) : ORIGIN = 0xa0000, LENGTH = 128K
   DATA (rw) : ORIGIN = 0x100000, LENGTH = 512K
-  RAM (rw) : ORIGIN = 0x180000, LENGTH = 8M
+  RAM (rw) : ORIGIN = 0x180000, LENGTH = 64M
 }
 
 SECTIONS
@@ -24,10 +24,10 @@ SECTIONS
     *(.bss)
     __bss_end = .;
   } >DATA
+
   __stack_end = ORIGIN(RAM) + LENGTH(RAM);
 }
 
-__kernel = 0x80000;
 __heap_start = ORIGIN(RAM);
-__heap_end = ORIGIN(RAM) + LENGTH(RAM) - 2M;
+__heap_end = ORIGIN(RAM) + 32M;
 __bss_size = (__bss_end - __bss_start)>>3;

kernel/main.c

@@ -1,12 +1,28 @@
 #include <uart.h>
+#include <dtb.h>
+#include <initrd.h>
 #include <shell.h>
+#include <vector.h>
 
-void main()
+void main(void *dtb)
 {
   uart_init();
+  uart_getc();
+  
+  DEBUG(dtb);
+
+  dtb_addr = dtb;
+  vector_t *dtb_cbs = make_vector(0);
+  VEC_PUSH(dtb_cbs, &initrd_dtb_cb);
+  fdt_traverse(dtb_cbs);
+
+  DEBUG(initrd_start);
+  DEBUG(initrd_end);
+
+  file_node_t *initrd_root = initrd_init();
 
   int shell_cont = 1;
   while (shell_cont) {
-    shell_cont = shell(); 
+    shell_cont = shell(initrd_root);
   }
 }